Digital Oscilloscope Product

Overview

A digital oscilloscope is a real-time waveform measurement instrument that captures, digitizes, and displays electrical signals. Unlike analog oscilloscopes which use a cathode-ray tube, digital oscilloscopes use analog-to-digital conversion and memory storage to record and analyze waveforms. The instrument is essential for circuit debugging, signal integrity analysis, power supply characterization, and frequency domain observation in both development and production environments.

Modern digital oscilloscopes offer memory depths from hundreds of megabytes to gigabytes, enabling long-duration transient capture. The FPGA-based acquisition engine processes data in real time, applying digital filters, measurements, and triggering logic that would be impossible in pure analog instrumentation. Touchscreen interfaces have replaced knob-and-button controls on benchtop instruments, while portable models serve field service and automotive diagnostics.

How it works

The signal path begins at the Probe Interface, where a 1 MΩ input impedance (with 13 pF shunt capacitance) terminates high-impedance test probes. This front-end impedance is a standard convention allowing passive × 10 probes to provide matched loading.

The Analog Front End consists of a Coupling Relay (AC/DC selection), Programmable Attenuator (decade attenuation for range selection), and Buffer Amplifier (low-noise buffer). The attenuator allows the 8-bit ADC IC to operate at optimal levels—overdriving causes clipping; underdriving wastes quantization resolution.

The ADC System includes the Clock Synthesizer (phase-locked oscillator) which sets the sample rate from 1 MS/s to 2 GS/s. The Anti-Alias Filter prevents aliasing by removing spectral content above the Nyquist frequency (one-half the sample rate). The ADC IC outputs parallel data words typically every nanosecond or faster.

The Acquisition FPGA receives raw ADC samples and executes real-time processing: peak detection (capturing min/max in fast transients), averaging (noise reduction across multiple acquisitions), and trigger arm/fire logic. The FPGA also formats data for display and buffers captures into the Memory System, a RAM Module accessible via a Memory Controller.

The Trigger Circuit monitors the input signal (often pre-acquisition) to arm capture on a user-defined edge, threshold, or pattern. A Trigger Comparator and Trigger Mode Logic implement single-shot, auto, and normal modes. Trigger delay (horizontal position) is achieved by storing pre- and post-trigger samples.

The Display Subsystem presents the captured waveform on an LCD Panel, driven by a LCD Video Driver that refreshes at 60 Hz. A Touch Digitizer enables menu navigation and parameter entry. The Backlight Module uses PWM for brightness control.

All subsystems draw regulated power from a Power Supply with isolated rails for analog (noise-sensitive ADC), digital (FPGA switching), and display stages.

Measurement and Analysis

Digital oscilloscopes measure voltage, time, and frequency with sub-microsecond resolution. Automated measurements include rise time, fall time, frequency, period, duty cycle, peak voltage, RMS, and area under the curve. Many models perform FFT (Fast Fourier Transform) to display frequency spectra and harmonic content.

The deep Memory System allows capture of low-frequency signals (sub-hertz) over minutes, and high-frequency transients at nanosecond precision. Zoom and pan functions enable post-acquisition navigation through terabytes of stored data.

Triggering Strategy

Effective triggering is critical. Edge trigger fires on rising or falling slope at a user-set threshold. Pulse-width trigger captures short glitches or duty-cycle anomalies. Timeout trigger detects quiet periods (ideal for spotting missing clock edges). The Trigger Circuit latches the trigger state to prevent false re-arms and ensures stable, repeatable captures.

Probe and Impedance Matching

The standard 1 MΩ, 13 pF input impedance works with passive × 10 probes (9 MΩ + ~1.2 pF series) for flat response to 100 MHz and beyond. Active probes (op-amp buffered) present much lower loading (typically 1–2 pF) and are used for low-level analog or high-speed digital signals. Incorrect probe termination causes ringing and measurement error.

Acquisition Modes

Real-time capture: Samples every cycle at the set sample rate; suitable for sub-Nyquist signals and high-frequency transients.

Peak detect: Samples the waveform at a fast rate, captures min/max values per display pixel, then decimates to screen resolution. Ideal for catching narrow glitches invisible at normal sample density.

Averaging: Acquires multiple captures and averages samples. Reduces random noise but assumes the signal is repetitive. Effective for noisy power supplies or sensor signals.

Design Tradeoffs

An 8-bit ADC quantizes voltage into 256 steps; for a ±10 V range, each step is 78 mV. To measure weak signals, Programmable Attenuator ranges narrow the span, improving effective resolution. Dual-channel designs capture two signals simultaneously for phase comparison; triggering on one channel while viewing the other is common practice.

Sample rate and memory depth trade against cost and power. A 2 GS/s 8-bit scope with 2 GB memory costs $5k–$15k; a 1 GS/s 500 MB scope costs $2k–$5k. Bandwidth is limited by the ADC IC and Anti-Alias Filter design—1 GHz bandwidth requires careful PCB layout, shielding, and termination.

Applications

• Circuit debugging and signal integrity verification
• Power supply ripple and transient measurement
• High-speed digital clock and data timing analysis
• RF burst and modulation envelope capture (with specialized probes)
• Sensor output characterization and noise floor assessment