Baseband Processor
AssemblyFPGA or ASIC implementing Layer 1 PHY, FFT, and precoding, interfacing to RF via high-speed digital lanes. A full specification article for this item is being written. Meanwhile its bill of materials and connections are below.
Bill of materials for Baseband Processor
4 top-level lines as of r140328| # | Item / sub-assembly | Part no. | Qty/assy | Ext. qty | Parts | Type |
|---|---|---|---|---|---|---|
| 1 | FPGA/ASIC | remote-radio-head-fpga-or-asic | 1× | 1 | · | part |
| 2 | Analog Frontend | remote-radio-head-analog-frontend | 1× | 1 | · | part |
| 3 | Memory Subsystem | remote-radio-head-memory-subsystem | 1× | 1 | · | part |
| 4 | Clock Recovery | remote-radio-head-clock-recovery | 1× | 1 | · | part |